Konsep Inti
Omni 3D is a 3D-stacked device architecture that efficiently integrates power, signal, and clock routing with BEOL-compatible transistors, enabling improved energy efficiency and area utilization compared to state-of-the-art complementary FET (CFET) designs.
Abstrak
The paper presents Omni 3D, a 3D-stacked device architecture that is naturally enabled by back-end-of-line (BEOL)-compatible transistors. Omni 3D arbitrarily interleaves metal layers for both signal/power with FETs in 3D, providing fine-grained, all-sided access to the FET active regions and maximizing 3D standard cell design flexibility. This is in contrast to approaches such as back-side power delivery networks (BSPDNs), complementary FETs (CFETs), and stacked FETs.
The key innovations of Omni 3D include:
- One of the power rails is lifted above the upper FET to eliminate tall vias that limit the channel width in CFETs, enabling 3-track cell heights that maintain comparable drive strength of 4-track CFETs.
- Signal pins are defined on both the top and bottom sides as input (I) and output (Z) for double-side routing.
- An interleaved metal (IM) layer is introduced between nFET and pFET to provide extra intra-cell routing tracks.
The authors explore multiple Omni 3D variants, including with and without the IM layer, and optimize these variants using a virtual-source BEOL-FET compact model. They establish a physical design flow that efficiently utilizes the double-side routing in Omni 3D and perform a thorough design-technology-co-optimization (DTCO) of the Omni 3D device architecture.
From their design flow, the authors project a 2.0× improvement in the energy-delay product and a 1.5× reduction in area compared to the state-of-the-art CFETs with BSPDNs.
Statistik
Omni 3D achieves a 2.0× improvement in energy-delay product and a 1.5× reduction in area compared to state-of-the-art CFETs with back-side power delivery networks.
Omni 3D reduces wire delay by 35.0% and driver delay by 36.0% compared to CFETs.
Omni 3D reduces net switching energy by 24.6% compared to CFETs.
Kutipan
"Omni 3D arbitrarily interleaves metal layers for both signal/power with FETs in 3D (i.e., nFETs and pFETs are stacked in 3D)."
"Importantly, the routing flexibility of Omni 3D is enabled by double-side routing and an interleaved metal (IM) layer for inter- and intra-cell routing, respectively."
"From our design flow, we project 2.0× improvement in the energy-delay product and 1.5× reduction in area compared to the state-of-the-art CFETs with BSPDNs."