The project explores the potential of chaotic systems, particularly the logistic map, for generating pseudo-random numbers. It implements the logistic map function in Verilog HDL on an FPGA and applies the Exponentially Weighted Moving Average (EWMA) technique to transform the chaotic output into a Gaussian-distributed sequence.
The system integrates additional FPGA modules for real-time interaction and visualization, including a clock generator, UART interface, XADC, and a 7-segment display driver. These components facilitate the direct display of PRNG values on the FPGA and the transmission of data to a laptop for histogram analysis, verifying the Gaussian nature of the output.
The proof of concept in Julia demonstrates the empirical ability to obtain a Gaussian distribution from the logistic map-based PRNG. The Verilog HDL implementation on the FPGA further validates this approach, showcasing the practical application of chaotic systems for generating Gaussian-distributed pseudo-random numbers in digital hardware.
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by Mateo Jalen ... at arxiv.org 05-01-2024
https://arxiv.org/pdf/2404.19246.pdfDeeper Inquiries