핵심 개념
IB-Net proposes a novel framework utilizing graph neural networks to accelerate SAT solving in LEC workflows.
초록
1. Introduction
Boolean Satisfiability (SAT) problems are crucial in Electronic Design Automation.
SAT solvers are essential for Logic Equivalence Checking (LEC) in circuit design verification.
Neural networks have been used to assist SAT solvers, but face challenges in LEC due to unsatisfiability nature.
2. Related Work
NN-based approaches have been used in EDA tasks, including verification like LEC.
Graph Neural Networks (GNN) have been applied to SAT constraint problem-solving.
3. IB-Net Approach
IB-Net utilizes GNN to predict UNSAT-core variables and interact with CDCL solvers.
Graph formulation and neural network model are key components of IB-Net.
4. Experimental Settings
Two datasets are used for training and evaluation: LEC circuit dataset and SAT Competition dataset.
IB-Net outperforms existing methods in UNSAT-core prediction and runtime efficiency.
5. Main Results
IB-Net shows superior performance in UNSAT-core prediction and runtime reduction on both datasets.
6. Ablation Study
WLIG construction, UNSAT-core prediction, and Focal loss contribute to the effectiveness of IB-Net.
7. Circuit Study
IB-Net demonstrates consistent performance improvement over Kissat on three main circuits in the LEC dataset.
8. Scalability
WGCN shows lower memory consumption and faster training times compared to LSTM, indicating scalability.
통계
IB-Net은 평균 실행 시간을 5% 줄이고 LEC Circuit 및 SAT Competition에서 8.3%의 실행 시간 감소를 달성했습니다.
인용구
"IB-Net achieves a 5.0% runtime speedup on industrial data and 8.3% on SAT competition data empirically."