The article discusses the challenges faced by GPUs due to limited memory capacity, especially in critical workloads like deep learning. It introduces a solution using high-capacity Storage-Class Memory (SCM) and DRAM cache to enhance memory capacity and performance. The proposed DRAM cache design considers GPU thread characteristics, SCM properties, and spatial locality to optimize caching efficiency. Additionally, a Configurable Tag Cache (CTC) is suggested to reduce DRAM cache probe traffic. Power management techniques are also proposed to address SCM's power consumption and thermal issues.
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by Jeongmin Hon... lúc arxiv.org 03-15-2024
https://arxiv.org/pdf/2403.09358.pdfYêu cầu sâu hơn