Keskeiset käsitteet
EasyACIM proposes a novel synthesizable ACIM architecture that can be easily implemented with different design specifications, and leverages a multi-objective genetic algorithm-based design space explorer to obtain high-quality ACIM solutions for versatile application scenarios.
Tiivistelmä
The paper presents EasyACIM, an end-to-end automated framework for Analog Computing-in-Memory (ACIM) design. Key highlights:
Synthesizable ACIM Architecture:
Proposes a novel ACIM architecture that can be easily implemented with different array size, local array size, and ADC precision.
Reuses the compute capacitors as the capacitors in the SAR ADC, reducing the ADC area overhead.
Combines multiple 8T SRAM cells into a local array to share the same compute capacitor and control circuits, introducing a trade-off between area and throughput.
MOGA-based Design Space Exploration:
Constructs an estimation model for the proposed ACIM architecture to evaluate performance metrics like SNR, energy, throughput, and area.
Leverages the NSGA-II algorithm to automatically explore the Pareto frontier for the synthesizable ACIM architecture with a given array size.
Allows users to distill the Pareto-frontier set based on their requirements, enabling agile design space exploration.
Template-based Hierarchical Layout Generation:
Integrates a template-based hierarchical placement and routing framework to generate the final ACIM layouts according to the Pareto-frontier design specifications.
Extends the classic grid-based algorithm to support manually designed cells, achieving better performance compared to fully automated layouts.
The experimental results demonstrate that EasyACIM can generate high-quality ACIM solutions with competitive performance to state-of-the-art ACIMs and a wide design space, ranging from 50TOPS/W to 750TOPS/W in energy efficiency and 1500F^2/bit to 7500F^2/bit in area.
Tilastot
The total SNR (SNRT) is given by:
SNRT = (1/SNRpre + 1/SQNRy)^-1
The throughput can be described as:
T = H / (L·W / (tcom + tset + tconv))
The total average energy for one-bit computing is:
E = Ecompute + Econtrol + EADC / (H/L)
The average area of ACIM is:
A = ASRAM + 1/L· ALC + 1/H· ACOMP + 1/H· BADC · ADFF
Lainaukset
"EasyACIM proposes a novel synthesizable ACIM architecture that can be easily implemented with different design specifications, and leverages a multi-objective genetic algorithm-based design space explorer to obtain high-quality ACIM solutions for versatile application scenarios."
"The experimental results demonstrate that EasyACIM can generate high-quality ACIM solutions with competitive performance to state-of-the-art ACIMs and a wide design space, ranging from 50TOPS/W to 750TOPS/W in energy efficiency and 1500F^2/bit to 7500F^2/bit in area."