מושגי ליבה
Evolutionary computation enhances task performance in unclocked, recurrent Boolean circuits in FPGAs.
תקציר
Abstract:
Unclocked, recurrent networks of Boolean gates in FPGAs used for low-SWaP reservoir computing.
Evolutionary computation applied to evolve network nodes' Boolean functions.
Two types of implementations demonstrated for learning and task performance improvement.
Introduction:
Traditional reservoir computing explained with artificial neurons and temporal dynamics.
Implementation of RC in FPGAs as unclocked, recurrently-connected Boolean logic gates for low-SWaP processing.
Methods:
Training approach benefits and practicality demonstrated using evolutionary computation.
Hardware implementation on a PYNQ-Z1 board with reconfigurable LUTs.
Experiments and Results:
Image Classification:
Network trained to classify 32-bit representations of handwritten digits from the MNIST database.
Evolutionary computation improved task performance significantly.
Dynamic Output:
Network evolved to generate dynamic signals correlated with input values.
Demonstrated capability for tasks requiring dynamic output like control systems.
Temporal Memory:
Network evolved to perform an "N-back" task showcasing temporal memory capabilities without external storage media.
Conclusion:
Low-SWaP networks of unclocked, recurrently-connected Boolean logic gates show promise for machine learning tasks.
Evolutionary computation enhances task performance beyond traditional methods with fast processing speeds and cost-effective hardware.
סטטיסטיקה
Obtaining an accuracy improvement of ∼30% on an image classification task while processing at a rate of over three million samples per second.