An energy-efficient stable diffusion processor is proposed for text-to-image generation, focusing on high throughput and reduced energy consumption. The processor implements Patch Similarity-based Sparsity Augmentation (PSSA) to decrease external memory access energy by 60.3% and achieve a total reduction of 37.8%. Additionally, Text-based Important Pixel Spotting (TIPS) allows processing FFN layer workload with low-precision activation, enhancing energy efficiency by 44.8%. The Dual-mode Bit-slice Core (DBSC) architecture further improves efficiency in FFN layers by 43.0%. The proposed processor achieves a peak throughput of 3.84 TOPS with an average power consumption of 225.6 mW, resulting in a highly energy-efficient text-to-image generation processor at 28 nm CMOS technology.
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arxiv.org
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by Jiwon Choi,W... ב- arxiv.org 03-11-2024
https://arxiv.org/pdf/2403.04982.pdfשאלות מעמיקות