Secure and Scalable Rowhammer Mitigation using Probabilistic Tracker Management Policies

Core Concepts

Probabilistic tracker management policies (PROTEAS) can enable secure and scalable Rowhammer mitigation using resource-constrained in-DRAM trackers.

Abstract

The paper focuses on mitigating DRAM Rowhammer attacks, which can cause security vulnerabilities by inducing bit-flips in neighboring DRAM rows through rapid activations. Recent solutions like Targeted Row Refresh (TRR) use in-DRAM trackers to identify aggressor rows and mitigate the attack by refreshing neighboring victim rows. However, these trackers are resource-constrained, typically storing only tens of entries, making them vulnerable to thrashing-based attacks that can evict tracked entries. The authors propose PROTEAS, a set of probabilistic tracker management policies, to enable secure and scalable Rowhammer mitigation using these resource-constrained trackers. PROTEAS includes two key components: Probabilistic Sampling: PROTEAS uses probabilistic request stream sampling (PRSS) to limit the number of insertions into the tracker, making it resistant to thrashing attacks. The sampling probability is carefully selected to ensure at least one insertion per refresh interval. Random Replacement: PROTEAS employs a random replacement policy for evictions, instead of a deterministic least-frequently-used (LFU) policy. This introduces non-determinism and ensures a diversity of rows are retained in the tracker, preventing targeted evictions. The authors evaluate PROTEAS against recent probabilistic defenses like DSAC and PARA. With a 16-entry tracker, PROTEAS limits the maximum disturbance (activations before mitigation) to 2.1K at 1 mitigation per refresh interval, 35x lower than a deterministic baseline. As the number of mitigations per interval increases to 2, 4, and 8, PROTEAS further reduces the maximum disturbance to 1.1K, 585, and 305, respectively, outperforming prior proposals by 60x to 222x. The authors also co-design PROTEAS with the Refresh Management (RFM) feature in DDR5, which allows additional mitigations per refresh interval. This enables PROTEAS to effectively mitigate Rowhammer even as the threshold (TRH) drops to 1K or 500, unlike deterministic trackers which benefit minimally from extra mitigations. The average performance impact of PROTEAS is less than 1% for TRH of 1K and 3% for TRH of 500.

Stats

The Rowhammer threshold (TRH) has dropped from 140K in DDR3 to just 4.9K in LPDDR4 over the last decade. The number of counters required for secure trackers increases from 87K to 512K as TRH drops from 1K to 500. With 1 mitigation per tREFI, the baseline deterministic tracker has a maximum disturbance of 74K activations. With 8 mitigations per tREFI, the baseline deterministic tracker still has a maximum disturbance of 65K-67K activations. With 1 mitigation per tREFI, PROTEAS has a maximum disturbance of 2.1K activations, 35x lower than the baseline. With 8 mitigations per tREFI, PROTEAS has a maximum disturbance of 305 activations, 222x lower than the baseline.

Quotes

"Rowhammer bit-flips are not just a reliability problem, but also a major security threat. Numerous studies have illustrated exploits using Rowhammer [1], [5], [8]–[10], [23], [37], [41]." "Such in-DRAM solutions are resource-constrained (only able to provision few tens of counters to track aggressor rows) and are prone to thrashing based attacks, that have been used to fool them." "PROTEAS can secure small in-DRAM trackers (with 16 counters per DRAM bank) even when Rowhammer thresholds drop to 500 while incurring less than 3% slowdown."

Key Insights Distilled From

Probabilistic Tracker Management Policies for Low-Cost and Scalable Rowhammer Mitigation

by Aamer Jaleel... at arxiv.org 04-26-2024

https://arxiv.org/pdf/2404.16256.pdf

Deeper Inquiries

How can PROTEAS be extended to work with other DRAM architectures beyond DDR5, such as HBM or LPDDR

PROTEAS can be extended to work with other DRAM architectures beyond DDR5, such as HBM or LPDDR, by adapting the design to accommodate the specific characteristics of these architectures. For HBM (High Bandwidth Memory), which is known for its high bandwidth and low power consumption, PROTEAS can be optimized to leverage the unique features of HBM, such as its stacked memory design and increased memory bandwidth. This optimization can involve adjusting the sampling probabilities and replacement policies to align with the faster access speeds and lower power requirements of HBM. Similarly, for LPDDR (Low Power Double Data Rate) memory, which is commonly used in mobile devices for its low power consumption and high data transfer rates, PROTEAS can be tailored to work efficiently with LPDDR's specific requirements. This adaptation may involve fine-tuning the sampling rates and replacement policies to align with the lower power consumption and specific timing characteristics of LPDDR memory. By customizing PROTEAS for different DRAM architectures, it can effectively mitigate Rowhammer attacks while maximizing performance and efficiency based on the unique features of each architecture.

What are the potential side-effects or limitations of using a pseudo-random number generator (PRNG) for the probabilistic sampling and replacement policies in PROTEAS

Using a pseudo-random number generator (PRNG) for the probabilistic sampling and replacement policies in PROTEAS may introduce potential side-effects or limitations. One limitation is the reliance on the quality of the PRNG algorithm used, as the randomness and unpredictability of the generated numbers are crucial for the effectiveness of the probabilistic policies. If the PRNG algorithm is not properly implemented or lacks randomness, it could lead to biased sampling or predictable patterns, reducing the effectiveness of the probabilistic policies in PROTEAS. Another potential side-effect is the computational overhead associated with generating random numbers using the PRNG. Depending on the complexity of the PRNG algorithm and the frequency of random number generation required by the sampling and replacement policies, there could be an increase in processing time and resource utilization, impacting the overall performance of the system. Additionally, the security of the PRNG seed used in PROTEAS is critical. If the seed is compromised or predictable, it could potentially be exploited by attackers to manipulate the sampling and replacement decisions, undermining the security of the system. Therefore, ensuring the confidentiality and randomness of the PRNG seed is essential to mitigate any security risks associated with its use in PROTEAS.

Could the probabilistic policies in PROTEAS be further optimized to reduce the performance impact for workloads with high DRAM access intensity

The probabilistic policies in PROTEAS can be further optimized to reduce the performance impact for workloads with high DRAM access intensity by fine-tuning the sampling probabilities and replacement strategies based on the workload characteristics. One optimization approach could involve dynamic adjustment of the sampling rates and replacement policies based on the workload patterns and access frequencies. For workloads with high DRAM access intensity, PROTEAS could dynamically adapt the sampling probabilities to prioritize tracking and mitigating the most frequently accessed rows while minimizing unnecessary tracker entries for less accessed rows. By intelligently adjusting the sampling rates based on the workload behavior, PROTEAS can focus on mitigating the most critical Rowhammer vulnerabilities without incurring unnecessary overhead for less impactful accesses. Furthermore, optimizing the replacement policies to prioritize entries that are more likely to be targeted by Rowhammer attacks in high-intensity workloads can enhance the efficiency of PROTEAS. By strategically selecting entries for replacement based on their vulnerability to thrashing and attack patterns, PROTEAS can improve its effectiveness in mitigating Rowhammer threats while minimizing performance impact for demanding workloads.