The content discusses the development of a DSML to incorporate the VDI/VDE 3682 standard into SysML, focusing on process descriptions. It highlights the importance of standardized modeling for system functions and the integration of OCL constraints for model verification. The approach aims to enhance understanding, acceptance, and model verification in Systems Engineering.
The paper outlines the fundamentals of the VDI/VDE 3682 standard, introduces a DSML profile for process description, and explains constraint modeling using OCL. It also addresses automated code generation for XML serialization and provides an application example from aircraft production. The study emphasizes the significance of structured process modeling based on PPR concepts within MBSE tools.
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