
The paper introduces a groundbreaking memory optimization methodology that systematically considers the allocation and utilization of both on-chip and off-chip memory within a layerwise pipelined, streaming architecture to enable efficient mapping of modern CNN models with large parameters and complex connections to FPGA devices.


coremsg

efficient-streaming-acceleration-of-modern-convolutional-neural-networks-on-fpgas-with-smart-off-chip-memory-management


Efficient Streaming Acceleration of Modern Convolutional Neural Networks on FPGAs with Smart Off-Chip Memory Management
